Functional Verification Blog

Methodologies helps in building the verification environment. But they sucks also.  A small mistake takes lots of time to figure out. If you are using OVM and stuck with debugging some wired error, you can increase the OVM verbosity level from the command line to see what exactly is happening inside the OVM macro’s and classes.  Pass the below switch with the command line options.

+OVM_VERBOSITY=600

or something like :

vsim +OVM_TESTNAME=mem_bitwalk_test +OVM_VERBOSITY=600 -do run.do -c mem_tb_top

Tags: OVM

This entry was posted on Tuesday, March 31st, 2009 at 10:19 am and is filed under System Verilog. You can follow any responses to this entry through the RSS 2.0 feed. You can leave a response, or trackback from your own site.